The Tsi620 evaluation platform uses Texas Instruments (TI) TMS320TCI6487 high performance multi-core DSP and an Altera; Stratix; III FPGA to enable prototyping and, ultimately, cost reduction in applications such as high performance wireless and video processing, medical imaging and military signal-processing solutions. The platform allows customers to use the RapidIO protocol for DSP or processor aggregation, while leveraging the Tsi620's hardware bridging to low cost PCI-enabled processors. The platform offers communication with a variety of cost competitive PCI-enabled microprocessors through a PMC connector, providing additional cost saving opportunities...
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The XS1-G Development Kit provides everything needed to develop a wide range of applications using its XS1-G4 programmable device. Designs are created using a C-based software development flow that dramatically shortens the time required to build electronic products and systems. the XS1-G development kit (XDK) features the XS1-G4 target device, QVGA touch screen display, RJ45 10/100 Ethernet port, high-performance stereo audio interface and XLink connectors for connecting multiple kits together. The XS1-G4 can be booted from JTAG, an SD/MMC card or on-board SPI boot PROM. The XS1-G4 device is programmed using web-based XMOS development tools which include C and XC compilers, simulator and debugger. The kit includes a tutorial in XC, an XMOS-originated programming language supporting parallelism, concurrent and real-time programming using channel-based communications, and event-driven control...
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The 2008.1 release of CHS design software provides electrical simulation functionality inherently within the core Capital Logic and Capital Integrator tools. The 2008.1 release of CHS design software helps engineers visualize how their designs function, supports decision making, and aids early debugging. CHS is a fully integrated application suite for electrical system design, electrical analysis, system integration / wiring design and harness engineering. It has powerful embedded data management capabilities (vehicle configuration management, workflow control, design comparison, etc). CHS is architected for large organizations (multi-user, multi-site) and includes substantial enterprise integration capabilities...
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3D integration with TSVs could accelerate the consolidation of more to be done in the current fabs CMOS wafer and the transition to a fabless foundry model. As the entire industry chain, all players are at the moment positioning technology and evaluation of 3-D technologies and platforms should be invested for their own businesses. Recent market forecasts indicate that 3D-TSV wafers in the millions and could have a potential impact on the maximum 25% of the memory business in 2015. If we exclude memories, our analysis shows that 3D-TSV wafers accounted for more than 6% of the total semiconductor industry until 2015...
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