Cadence Announces Silicon Ready RTL to GDSII Reference Flows for ARM Cortex-A9 Processor

The RTL to GDSII Reference Flows are available for three configurations of the ARM Cortex-A9 processor: single core, dual Cortex-A9 MPCore(tm) multicore processor and quad Cortex-A9 MPCore(tm) multicore processor. The reference methodologies represent what engineers can expect while doing actual tapeouts, including the necessary steps for silicon-ready design, such as timing analysis for on-chip variation (OCV), clock uncertainty and signal integrity (SI)…