Cypress Announces First 65nm 144 Mbit QDRII SRAM

The New Cypress’s 65-nm 144-Mbit QDRII, QDRII , DDRII and DDRII memories leverage 65-nm process technology developed with foundry partner UMC. They feature the market’s fastest available clock speed of 550 MHz and a total data rate of 80 Gbps in a 36-bit I/O width QDRII device, and consume half the power of 90-nm SRAMs. They are ideal for networking applications, including Internet core and edge routers, fixed and modular Ethernet switches, 3G base stations and secure routers, and also enhance the performance of medical imaging and military signal processing systems. The devices are pin compatible with 90-nm SRAMs, enabling networking customers to increase performance and double address table or packet buffer size while maintaining the same board layout. The New 65-nm QDR and DDR SRAMs offer up to 50% lower standby and dynamic current consumption, enabling the new wave of “green” networking infrastructure applications. The QDRII and DDRII devices have On-Die Termination (ODT), which improves signal integrity, reduces system cost, and saves board space by eliminating external termination resistors. The 65-nm devices use a Phase Locked Loop (PLL) instead of a Delay Locked Loop (DLL), which enables a 35 percent wider data valid window to simplify board-level timing closure and enhance compatibility with third-party processors…

65nm 144-Mbit QDRII SRAM
(Picture: Cypress)