GigOptix Introduces Second Generation CX7800 Hybrid ASIC Technology in 65nm

By pur, Thursday, December 10th, 2009
Category: IC, Chip, SoC, IP Core

Hybrid ASIC is a standard cell implementation optimized for density and it includes an integrated, pre-defined Structured ASIC core. The Structured ASIC core is treated like any other hard macro on the die. ChipX can customize the macro to have any gate size and shape on the die. Customers identify a portion of the design that is subject to change in the future and wish to have it implemented in the Structured ASIC macro. Customers benefit from re-usability, low NREs for derivative products and fast re-spins. Typical applications include systems that require a variety of video compression schemes, data encryption and pre-standard protocol implementations. Hybrid ASICs combine embedded metal-configurable digital logic with standard cell logic, Input/Output (I/O), memory and mixed signal Intellectual Property (IP). This development approach allows for rapid and economical product line development, enabling companies to introduce products five weeks faster than 65nm standard cell technology allows and saving companies an average of $500,000 in Non-Recurring Engineering (NRE) and tooling costs on each derivative product. Adding to its 65nm standard cell design capability, GigOptix Hybrid ASICs offer customers additional flexibility in developing derivative products, adding important end customer features at the last minute, correcting major bugs and making significant changes to the logic design - all very quickly and inexpensively…

Hybrid-ASIC

Hybrid ASIC Technology
(Picture: chipx)


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configurable digital logic