NXP and Intrinsic-ID Announce Collaborative Agreement to License and Deploy a Hardware Intrinsic Security Solution in SmartMX Technology
NXP and Intrinsic-ID collaborate to license and deploy a hardware intrinsic security (HIS) solution in NXP’s next-generation SmartMXTM security chip technology. The partnership enables NXP to utilize Intrinsic-ID’s QuiddikeyTM solution to secure SmartMX-powered assets against cloning, tampering, theft-of-service and reverse engineering. The SmartMX (Memory eXtension) multiple interface option platform features a significantly enhanced smart card IC architecture. New powerful opcodes are available beyond the compatible classic 8051 instruction set. The SmartMX platform manufactured in most advanced CMOS 0.18um 5 metal layer technology is positioned to service high volume, mono dan multi application markets such as eGoverment (e.g. Smart Passport), banking/finance, mobile communications, public transportation, pay TV, conditional access, and network access. As the first smart card controller platform of its kind the SmartMX portfolio incorporates three interface options as an integral part of a highly secure smart card controller portfolio – ISO/IEC 7816 Contact interface, ISO/IEC 14443 Contactless interface and USB 2.0 LS interface. SmartMX Enables the easy implementation of state of the art operating systems and open platform solutions including Java card global platform and MULTOS and offers an optimized feature set together with the highest levels of security. Within its targeted segments, the new platform is the most advanced solution available, combining exceptional powerful co-processors for public and secret key encryption (supporting RSA, ECC, DES and AES), with Philips Semiconductors unique security, power and performance optimized design concept named TANGRAM technology. The platform supports Class “A”,”B” and “C” voltage ranges (1.62 – 5.5V) as required by application standards such as 3G Mobile communication (3GPP) and the credit/debit card standard (EMV) …

SmartMX Block Diagram
(Pictures: NXP)
