Rambus Demonstrates Complete XDR Memory System up to 7.2Gbps with Superior Power Efficiency

By pur, Thursday, June 25th, 2009
Category: Memory, Microcontroller, Microprocessor

The demonstration consists of Elpida’s recently-announced 1Gb XDR DRAM device and an XIO memory controller transmitting realistic data patterns. The XIO memory controller is up to 3.5 times more power efficient than a GDDR5 controller, and the total memory system can provide up to two times more bandwidth than GDDR5 at equivalent power. The XIO memory controller demonstrated bi-modal operation with support for both XDR DRAM as well as next-generation XDR2 DRAM…

XDR-Memory-Architecture

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XDR2-Memory-Architecture

XDR and XDR2 Memory Architecture
(Photos: Rambus)


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Search terms:

xio memory controller, xdr memory system