Renesas Technology Announces 72-Mbit Quad Data Rate II+ (QDR II+) and Double Data Rate II+ (DDRII+), High-speed SRAM Product Family for High-End Routers and Switches in Next-Generation Communication Networks

July 8th, 2009, by pur, in Communication, IC/Chip/SoC, Memory, Networking

These SRAM products achieve the industry’s fastest level operating speed and are compliant with the QDR Consortium industry standard. Additionally, this release also includes 72-Mbit QDRII and DDRII SRAM devices. QDR™ II (Quad Data Rate) SRAMs and DDR II (Double Data Rate) SRAMs are the ideal memory devices for next generation networking and communications systems. These ultra-fast devices can support high bandwidth systems that require memories capable of very high operating frequencies combined with low latencies and full cycle utilization. QDR II SRAMs can provide double data rate (DDR) operation on each data pin through independently operated read and write ports, and can transfer four words of data on one clock cycle. This allows for bus contention to be virtually eliminated between the memory controller and the SRAM. Additionally, QDR II SRAMs utilize high speed I/Os via HSTL (high speed transceiver logic) to support next generation networking systems. The QDR-II SRAMs can support high end network switches, routers and other communication solutions based on LA-1 (Standard of the Look-Aside Processor Interface) designs. They are especially designed to fulfill data rates corresponding to network standards such as OC-48, OC-192 and OC-768.In the case of DDR II SRAMs, the data is written or read twice every clock cycle. This provides for a significantly higher transfer rate than standard synchronous SRAM devices. In applications that require continuous read/write capability such as in look-up tables for network switches and routers, DDRII SRAMs are an ideal solution.The QDR-II SRAM and DDR-II SRAM family was defined by the members of the QDR SRAM Consortium and ratified through JEDEC. The devices are available in x9, x18 and x36 configurations and frequencies ranging from 167MHz up to 333MHz. They provide low volt operation at 1.8V and are available in standard BGA packages…

72-Mbit QDR™ II+ SRAM and DDR II+ SRAM

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72-Mbit QDR™ II+ SRAM and DDR II+ SRAM - small

72-Mbit QDR™ II+ SRAM and DDR II+ SRAM Family
(Pictures: Renesas)

 

Press Releases:

Renesas Technology Introduces Highest Level Performance 72-Mbit QDR™ II+ SRAM and DDR II+ SRAM Family

533 MHz frequency for Next-Generation Communication Networks

Renesas Technology Corp. announced the 72-Mbit Quad Data Rate II+ (QDR™ II+) and Double Data Rate II+ (DDRII+) high-speed SRAM *1 product family for use in high-end routers and switches in next-generation communication networks. These SRAM products achieve the industry’s fastest level operating speed and are compliant with the QDR Consortium *2 industry standard. Additionally, this release also includes 72-Mbit QDRII and DDRII SRAM devices. The full range of devices, consisting of multiple speeds and configurations, will be available from August 2009 sequentially in Japan.

These new products offer the following features.

(1) Achievement of the industry’s fastest level operating speeds: 533 MHz for the QDRII+ and DDRII+ SRAM and 333 MHz for the QDRII and DDRII versions

For these products, Renesas greatly increased the operating speeds while maintaining low-voltage operation by utilizing the advanced 45 nm fabrication process. The QDRII SRAM products achieve the industry’s highest operating speed level of 333 MHz, and the QDRII+ SRAM products also provide the industry’s highest operating speed level of 533 MHz. These devices can support high-speed processing for packet look-up and packet buffer applications in high-end routers and switchers that support 10G, 40G, and beyond multi-layer communication systems.

(2) Broad portfolio of 72-Mbit devices

Renesas will provide products that support three data I/O widths (9, 18, or 36 bits) and two burst lengths (2 or 4 words). In addition, Renesas will also provide products that feature a built-in ODT (on-die termination) function that significantly reduces the signal quality degradation that can occur during high-speed operation. Renesas’ extensive lineup of QDRII, DDR II, QDRII+, and DDRII+ SRAM products allows users to select solutions that are optimal for their systems.

< Product Background >

With the ever-growing popularity of the Internet, transmission speeds and the amount of traffic being sent to communication equipment continue to increase, with data rate speeds now exceeding 40-Gbits/second. Checking data destinations and managing data packet traffic in high-end networking equipment is driving the demand for high-density memory capable of high speeds. Furthermore, the complexity of data continues to increase with video, voice, and data applications, requiring even larger memory capacities.

Renesas Technology currently provides a broad range of SRAMs for industrial applications and for cache memory in UNIX *3 servers and workstations, and 18-Mbit Network SRAM and 36-Mbit DDRII and QDRII SRAM for communication equipment. As network equipment evolve to higher levels of performance and capability, Renesas Technology has leveraged its design expertise and manufacturing technologies to achieve higher speeds and high reliability for the 72-Mbit QDRII and QDRII+ SRAM products to meet the demands for higher speed, larger capacity, and greater bit widths required for communication applications.

< Product Details >

These products are available in all combinations of burst lengths and bit widths, and the standard HSTL (High-Speed Transistor Logic) interface is used for ultra high-speed synchronous SRAM.

The package used is a 165-pin plastic FBGA with a 15 mm × 17 mm size that features excellent thermal dissipation characteristics and is suitable for high-density mounting. These products are RoHS Directive *4 compliant and lead-free versions are also available. The QDR pin configuration can support seamless migration to densities up to 288 Mbits in the future. In addition, FBGA package products support the IEEE standard test access port and boundary scan architecture (IEEE Std 1149.1-1990) that allow interchange connection checking during module mounting to be conducted at the board level.

In future developments in this area, Renesas has a solid roadmap and commitment to develop even larger and higher performance QDR/DDR SRAM products to support evolving customer needs.

< Notes >

Notes:

1. Quad Data Rate II+ (QDR™II+) and Double Data Rate II+ (DDRII+)
SRAM:

QDRII+ SRAM is an even faster version of the second generation QDR SRAM product. DDRII+ SRAM is also a faster version of the second generation DDR SRAM product.
QDR SRAM and DDR SRAM adopt a DDR technique where, while acquiring the address and control signals from the processor or controller in synchronization with the system clock, the SRAM also writes or reads data signals in synchronization with both the system clock and an inverted system clock signal. As a result, these devices can achieve transfer rates that are twice those of earlier synchronous SRAM. Furthermore, since the input and output pins are separate and isolated, read and write operations can be performed at the same time. This allows data to be transferred with excellent efficiency and makes it possible to achieve data rates that are four times those of earlier synchronous SRAM devices.

* Quad Data Rate and QDR include a new family of products developed by Cypress Semiconductor Corp., Integrated Device Technology, Inc., NEC Electronics Corporation, Samsung Electronics Co., Ltd., and Renesas Technology Corp.

2. The QDR Consortium (the QDR Co-Development Team):

In 1999, the QDR co-development team was created to define a new family of SRAM architectures for high-performance communications applications. The QDR co-development team currently consists of Cypress Semiconductor Corp., Integrated Device Technology, Inc., NEC Electronics Corporation, Samsung Electronics Co., Ltd., and Renesas Technology Corp. These companies cooperate in the development of the QDR family of networking SRAMs. They design and manufacture this family of products in their own fabrication facilities and develop products according to their own schedules, competing in the marketplace.
http://www.qdrconsortium.com/

3. UNIX is a registered trademark of The Open Group in the U.S. and other countries.

4. RoHS Directive: A European Union (EU) Directive for “the restriction of the use of certain hazardous substances in electrical and electronic equipment.” It went into effect on July 1, 2006, and covers six substances: lead, mercury, cadmium, hexavalent chromium, polybrominated biphenyl (PBB), and polybrominated diphenyl ether (PBDE).
* Other product names, company names, or brands mentioned are the property of their respective owners.
< Typical Applications >

* Next-generation communication equipment such as high-end routers and switches

< Specifications >

72-Mbit-QDRII-and-QDRII+-SRAM

72-Mbit-DDRII-SRAM 03

72-Mbit-DDRII+-SRAM 03

Note 1.
The ** is replaced by the bit structure to form the product name.
Example –– R1Q2A72**RBG: For a ×9 bit structure, the product name is R1Q2A7209RBG; for a ×18 bit structure, it is R1Q2A7218RBG; and for a ×36 bit structure, it is R1Q2A7236RBG.

Note 2.
JTAG (Joint Test Action Group): Boundary scan test standard stipulated by IEEE 1149.1.

More information about High-speed SRAM can be found at Renesas Website