STMicroelectronics Announces the STiDP888 and STiDP880, the Industry’s First Internal DisplayPort Standard for Next-Generation LCD TVs
The STiDP888 and STiDP880 are the industry’s first ‘bridge’ chipsets for the proposed iDP (Internal DisplayPort) standard to LVDS (Low-Voltage Differential Signalling) translation for use in next-generation LCD TVs. The new chipsets are compliant with the iDP interface standard recently proposed by ST, in collaboration with LG Display, to the Video Electronics Standards Association (VESA) TV Panel Task Group. Designed for the connection between the TV-controller SoC (System-on-Chip) and a TV-panel Timing Controller within a TV chassis, iDP is an advanced technology based on DisplayPort, a proven industry-standard technology that is an open and royalty free VESA standard. The chipset solution comprises a single-link iDP interface capable of transporting uncompressed pixel streams up to 12.96Gbps bandwidth between TV SoC and LCD panel module over four pairs of low-cost twisted wires or FFC (Flat Flexible Cable) cabling. ST’s iDP transmitter and receiver devices are fully scalable: each chipset can support FHD (Full High-Definition) video (at 1080p/30-bit per pixel) at 120Hz refresh rate; two sets can support FHD-240Hz refresh rate panels. Both the transmitter and receiver devices integrate high-speed Quad-LVDS interfaces for conversion between conventional Quad-LVDS and iDP to address transitional market needs. These products offer maximum flexibility to TV manufactures and enable seamless transition to iDP. The STiDP888 and STiDP880 components are packaged in 164-ball LFBGA package…
STiDP888-and-STiDP880
