Entries summary:

• 65 Nanometer, Umc 65nm Fdks
• Wind, Chip Debugging
• Electromagnetic Tool, Active Accuracy Assurance
• Code Coverage, Code Coverage Tool

Cadence Design Systems, Inc.and UMC announced the availability of UMC 65-nanometer Foundry Design Kits (FDKs) for the latest Cadence Virtuoso custom design platform (IC 6.1) release. The kits will be available for designers using UMC's logic/mixed-mode 65-nanometer standard performance (SP) process and logic/mixed- mode RF 65-nanometer low-leakage (LL) process. The Cadence Virtuoso technology helps accelerate silicon-accurate design of analog, mixed-signal and RF devices. "The availability of the 65-nanometer design kits will help our customers more quickly realize the performance and power consumption advantages of our production proven 65-nanometer SP and RF LL technology," said Patrick T...

To fully realize and harness the power of processors for the mobile market requires a solid development foundation..

The program is part of our Active Accuracy Assurance (AAA) initiative previously launched, and provides designers the ability to select qualified EM tools to match their design needs, improve compliance with TSMC processes, and ensure design accuracy for first time silicon success. The program today focuses on individual point tools, but will expand to include EM tool interoperability within the full mixed-signal and RF design flow. - Tom Quan, TSMC Taiwan Semiconductor Manufacturing Company, Ltd. (TSE: 2330, NYSE: TSM) unveiled a comprehensive Electromagnetic (EM) Tool Qualification Program that drives its Design Service Ecosystem partners to ensure greater accuracy of EM simulators and extractors used in applications such as high-speed digital clock circuits and high-frequency mixed-signal RF designs. Targeting TSMC's 90 and 65 nanometer (nm) process technologies, the program improves device model accuracy, supports a wider selection of qualified EM tools, significantly reduces customer EM tool evaluation efforts, lowers the risk and eases adoption of TSMC advanced process technologies...

JEDA's SystemC code coverage product allows our joint customers to improve verification by measuring their design quality. Using the common SystemC standard allows the ESL ecosystem to continue to grow, providing significant value for customers over proprietary languages. We're happy to work with JEDA to support leading-edge customers using ESL synthesis and the SystemC standard. - Brett Cline, Forte Design Systems. JEDA Technologies announced the availability of NSCvCC, a code coverage product for C/C++ and SystemC designs, especially for model developers, platform developers, system designers and architects...