The SHARC processors introduced are: the 21469 (industrial temperature range packaging) for industrial and instrumentation; the 21469W, 21465W, and 21462W for automotive audio; and the 21467 for home theater. The New series of SHARC processors are based on a single-instruction multiple-data (SIMD) core that supports 32-bit fixed-point as well as 32-/40-bit floating-point arithmetic formats, making them particularly suitable for high-performance applications. These new fourth-generation SHARC processors offer more than two times the 32-bit floating-point family’s performance compared with earlier SHARC offerings. One key contributor to this performance increase is the addition of hardware accelerators for widely used signal processing operations: FIR (Finite Impulse Response), IIR (Infinite Impulse Response), and FFT (Fast Fourier Transform)…

NEW SHARC® PROCESSORS PROVIDE THE INDUSTRY’S HIGHEST-PERFORMANCE FLOATING-POINT DSP

More than doubles previous SHARC performance; ideal for industrial, automotive, and audio applications

The MSC8156 processor is a six-core device based on new SC3850 StarCore DSP core technology and designed to dramatically advance the capabilities of wireless broadband base station equipment. The MSC8156 is one of the industry’s first DSPs based on 45-nm process technology, endowing the part with performance, energy efficiency and form factor advantages. It delivers the flexibility, integration and affordability required for mainstream, near-term deployment of networks based on LTE and other next-generation wireless standards. The MSC8156 is a single processor that replaces multiple discrete parts required by other solutions. The exceptional performance of the MSC8156 supports the high data rates specified by the latest OFDMA standards and enables the high throughput and low latency requirements of next-generation base stations…

Freescale DSP sets new performance levels to speed deployment of LTE and other next generation wireless standards

Advanced six-core MSC8156 delivers 6 GHz performance; integrates enhanced StarCore™ technology and multi-standard accelerators at 45-nm geometries

The increasing demand for high-performance digital signal processing has led designers to a combined DSP processor and FPGA co-processor architecture. The new Co-Processing SpeedWay helps students leverage the benefits of high-level processor-based software design with the parallel DSP computation power of FPGAs. By taking the new Co-Processing SpeedWay Workshop, developers will learn a design methodology that lets them use FPGA co-processing to improve overall system performance without requiring knowledge of RTL design flows…

Avnet, The MathWorks, TI, Xilinx Launch Co-Processing SpeedWay Workshop

New Workshop Features Techniques for Creating FPGA-based Co-Processors for DSPs

Avnet Electronics Marketing, an operating group of Avnet, Inc. (NYSE: AVT), The MathWorks, Texas Instruments and Xilinx announce the launch of a 2-day Co-Processing SpeedWay Design Workshop[tm]. “Creating FPGA-based Co-Processors for DSPs Using Model-Based Design” features the Spartan-3A DSP FPGA / DaVinci Development Platform announced yesterday. The workshops are being offered in locations throughout North America, Europe and Asia beginning December 1, 2008.