Virage Logic Announces SiPro(TM) PCI Express PHY Product Line, a Silicon and Volume Production-Proven 40-Nanometer (nm) G PCI Express Gen1/Gen2 Physical Layer (PHY)

Wed, Jul 29th, 2009. In IP Core, Semiconductor
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Virage Logic’s SiPro PCI Express is the first advanced interface IP offering that has been made available through a collaborative agreement with AMD that enables Virage Logic to provide AMD’s production proven technology for PCIe, HDMI and MIPI standards-based interface IP at advanced process nodes for customers who require a robust, low risk solution. Virage Logic’s SiPro PCI Express PHY offers customers a high performance and low power option that is silicon and production proven for high volume implementation in the most advanced process nodes to help lower cost, improve performance, and reduce power – even for the most constrained SoC or ASIC designs. SiPro PCI Express PHY has been rigorously verified and characterized to help reduce risk, improve time-to-market, and maximize yield…

Key Product Features

 

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  • Compliant with PCI-Express Base Specification Rev 2.0, 1.1 and 1.0a
  • PIPE Compliant
  • Available in x1, x2, x4 or x8 configuration
  • Various testability features
  • 500MHz/250MHz data rate between PHY and Controller
  • Precision PLL for low error rate data capture and simplified system design
  • Supports all power down modes and other standard features and addendums

Key Product Benefits


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