XJTAG Announces XJFlash Speed Improvement of Flash Programming XJTAG Boundary Scan System

Fri, Mar 20th, 2009. In Memory, Module, SoM

XJFlash uses the internal circuitry of an onboard FPGA to create a simple flash programmer. This relieves the bandwidth restricted JTAG scan chain of repetitive tasks such as shifting in control, address and data bits. By removing traffic from the scan chain, the XJTAG system is able to achieve close to theoretical programming times for a given flash memory device. With XJFlash module, improvement in flash programming speeds with certain flash/FPGA configurations have seen up to a 50-fold. This is great news for product developers as they need convenient and effective methods for programming and reprogramming flash at very high speeds without removing memories from the board…


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